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Rev Log message Author Age Path
998 added missing fout initialization markom 7976d 23h /
997 PRINTF should be used instead of printf; command redirection repaired markom 7977d 00h /
996 some minor bugs fixed markom 7977d 23h /
995 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7978d 07h /
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7978d 07h /
993 Fixed IMMU bug. lampret 7978d 07h /
992 A bug when cache enabled and bus error comes fixed. simons 7978d 16h /
991 Different memory controller. simons 7978d 16h /
990 Test is now complete. simons 7978d 16h /
989 c++ is making problems so, for now, it is excluded. simons 7980d 00h /
988 ORP architecture supported. simons 7980d 15h /
987 ORP architecture supported. simons 7980d 23h /
986 outputs out of function are not registered anymore markom 7980d 23h /
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7981d 11h /
984 Disable SB until it is tested lampret 7981d 11h /
983 First checkin lampret 7981d 13h /
982 Moved to sim/bin lampret 7981d 13h /
981 First checkin. lampret 7981d 13h /
980 Removed sim.tcl that shouldn't be here. lampret 7981d 13h /
979 Removed old test case binaries. lampret 7981d 13h /
978 Added variable delay for SRAM. lampret 7981d 13h /
977 Added store buffer. lampret 7981d 13h /
976 Added store buffer lampret 7981d 13h /
975 First checkin lampret 7981d 13h /
974 Enabled what works on or1ksim and disabled other tests. lampret 7981d 15h /
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 7983d 19h /
972 Interrupt suorces fixed. simons 7983d 20h /
971 Now even keyboard test passes. simons 7983d 22h /
970 Testbench is now running on ORP architecture platform. simons 7984d 11h /
969 Checking in except directory. lampret 7985d 03h /

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