OpenCores
URL https://opencores.org/ocsvn/pairing/pairing/trunk

Subversion Repositories pairing

[/] - Rev 33

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
33 new email & English name of the author homer.xing 4476d 16h /
32 changed surname: Xing -> Hsing. homer.xing 4476d 17h /
31 accurate source code copyright comment header homer.xing 4476d 17h /
30 LGPL header homer.xing 4486d 21h /
29 default net type is wire homer.xing 4493d 17h /
28 Non-net port XXX cannot be of mode input, when using the "`default_nettype none" to turn off automatic inference of wires in the design. ha ha homer.xing 4493d 20h /
27 definition for undefined wire homer.xing 4493d 21h /
26 Detailed description for the ModelSim macro file and the main test bench file homer.xing 4499d 17h /
25 simulation scripts and readme-file explaining how to start the simulation homer.xing 4499d 17h /
24 LGPL claim in each source hdl file homer.xing 4507d 17h /
23 LGPL license text homer.xing 4507d 17h /
22 Change TAB to space homer.xing 4507d 19h /
21 Add detailed input data capture condition in the document homer.xing 4507d 19h /
20 Add a module and a testbench for Xilinx ISE post-route simulation homer.xing 4508d 21h /
19 Update synthesis result homer.xing 4509d 15h /
18 add synthesis result homer.xing 4509d 15h /
17 use logic for $f3m_mux6$ homer.xing 4509d 16h /
16 Add synthesis configuration files homer.xing 4509d 19h /
15 add document. ha ha ha homer.xing 4509d 21h /
14 Move constraint file homer.xing 4509d 21h /
13 Add document and synthesis directories homer.xing 4509d 21h /
12 Simplify the interface of the core. homer.xing 4509d 22h /
11 Cheers! as fast as a rocket homer.xing 4510d 18h /
10 Ho ho, better circuit homer.xing 4511d 12h /
9 Add constrains file for ISE homer.xing 4512d 15h /
8 Finished Tate Pairing. Ha ha ha homer.xing 4512d 16h /
7 Finish inversion @ f33m homer.xing 4520d 21h /
6 add testbench for $f33m$. homer.xing 4521d 21h /
5 rename director : verilog/ -> rtl/ homer.xing 4521d 21h /
4 add testbench homer.xing 4522d 19h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.