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Rev Log message Author Age Path
85 Changed Vendor ID defines. mihad 7803d 00h /
84 Changed vendor ID. mihad 7806d 18h /
83 Cleaned up the code. No functional changes. mihad 7831d 17h /
82 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7845d 13h /
81 Updated synchronization in top level fifo modules. mihad 7845d 13h /
80 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7848d 18h /
79 Updated. mihad 7848d 18h /
78 Old files with wrong names removed. mihad 7848d 18h /
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7848d 19h /
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7851d 18h /
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7854d 19h /
74 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7854d 19h /
73 Bug fixes, testcases added. mihad 7854d 19h /
72 *** empty log message *** mihad 7901d 23h /
71 Changed the code a bit to make it more readable.
Functionality not changed in any way.
More robust synchronization in fifos is still pending.
mihad 7909d 15h /
70 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7946d 22h /
69 Changed BIST signal names etc.. mihad 7946d 22h /
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 7950d 08h /
67 Changed BIST signals for RAMs. tadejm 7950d 12h /
66 Changed empty status generation in pciw_fifo_control.v mihad 7953d 23h /
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 7956d 21h /
64 The testcase I just added in previous revision repaired mihad 7956d 23h /
63 Added additional testcase and changed rst name in BIST to trst mihad 7957d 01h /
62 Added BIST signals for RAMs. mihad 7959d 18h /
61 This commit was manufactured by cvs2svn to create tag 'rel_1'. 7967d 18h /
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 7967d 18h /
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7967d 19h /
58 Removed all logic from asynchronous reset network mihad 7972d 19h /
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7973d 01h /
56 Number of state bits define was removed mihad 7973d 16h /

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