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Rev Log message Author Age Path
153 last modifications for tb_compiler.py compliance jguarin2002 4494d 15h /
152 Test bench oriented modifications jguarin2002 4498d 16h /
151 Previous Work to generate test benching jguarin2002 4557d 12h /
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4571d 10h /
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4571d 13h /
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4571d 13h /
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4574d 01h /
146 Interruption Machine jguarin2002 4581d 19h /
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4586d 09h /
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4593d 12h /
143 working on result queue sync decoding signals jguarin2002 4598d 05h /
142 Additions for the State Machine jguarin2002 4603d 03h /
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4670d 04h /
140 Syncing: its awful work..... jguarin2002 4670d 10h /
139 Sync jguarin2002 4682d 01h /
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4686d 16h /
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4692d 16h /
136 gogogo jguarin2002 4695d 03h /
135 Correction on conectiveness of Datapath Control... jguarin2002 4699d 04h /
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4701d 00h /
133 Added the instructions queue jguarin2002 4702d 15h /
132 There was amiss in the cross product datapath decoder jguarin2002 4706d 11h /
131 Post RTL check on memblock jguarin2002 4706d 17h /
130 RayTrac Internal Memory Blocks among operands registers and Intermediate Results Fifos jguarin2002 4707d 11h /
129 Memory Block:

Identified the four circuits: External Write, External Read, Internal Write, Internal Read.
jguarin2002 4713d 00h /
128 Memblock, for input registers and intermezzo results queues: normfifox26x96 & dpfifo9x64, dpc is done jguarin2002 4720d 03h /
127 Datapath Control
Done
jguarin2002 4720d 14h /
126 dpc: Datapath Control Finished..... test it jguarin2002 4724d 09h /
125 DPC the result is just left jguarin2002 4725d 03h /
124 lost.... jguarin2002 4729d 03h /

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