OpenCores
URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] - Rev 180

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
180 Moved WbClkDomain to its own unit.
Refs #60.		 rkastl 4923d 15h /
179 Fixing build:
Added library generation to Makefile.		 rkastl 4923d 15h /
178 Fixed regression:
Testbenches did not support synchronous reset.		 rkastl 4923d 15h /
177 Split SdTop into SdClkDomain and SdTop. Refs #60. rkastl 4923d 15h /
176 Thesis:
Conclusion

Fixes #53,#61.		 rkastl 4923d 15h /
175 Thesis:

Fixes #45.		 rkastl 4923d 15h /
174 Thesis:
System integration

Fixes #51.		 rkastl 4923d 15h /
173 Thesis:
Started with SdController description.

Refs #38.		 rkastl 4923d 15h /
172 Thesis:
wbclockdomain: refactored and finished.

Fixes #39.		 rkastl 4923d 15h /
171 Worked on wishbone part of thesis.

Refs #37.
Refs #39.		 rkastl 4923d 15h /
170 License rewritten to BSD rkastl 4923d 15h /
169 +sdc file for timing analysis rkastl 4923d 15h /
168 TbdSd synthesis script reaches timing constraints. rkastl 4923d 15h /
167 Read+Modify+Write works on HW

+ Fixed CRC status token (not mentioned in simplified spec)
+ Improved TestWbMaster to RMW		 rkastl 4923d 15h /
166 tbTbdSd: fixed rkastl 4923d 15h /
165 Only use synchronous high active reset in SDHC-SC-Core. rkastl 4923d 16h /
164 Headers updated (LGPL, consistent format) rkastl 4923d 16h /
163 Header-Skript supports writing to file and infile replacement. rkastl 4923d 16h /
162 Script for generating headers created. rkastl 4923d 16h /
161 Verification:
CardModel: Check CRC on received data		 rkastl 4923d 16h /
160 Verification:
Full random read and write single blocks sequence works with
checks.
Checking the CRC in the card model is missing.
Writing at addresses above the card size is missing.
Erasing is missing.		 rkastl 4923d 16h /
159 Verification:
Further work: Checking RAM Actions and reading data is still
missing		 rkastl 4923d 16h /
158 Verification:
Work on Checking
Functional coverage		 rkastl 4923d 16h /
157 Verification:
Testcase with Reads works but Verification not completly
implemented.		 rkastl 4923d 16h /
156 SdVerification:
+ Split a SdCoreTransaction into multiple WbTransactions: Proof
of Concept with a ReadSingleBlock-Transaction
+ Finish after certain amount of time and present simulation
result		 rkastl 4923d 16h /
155 SdVerification:
continue to work on it, not done.		 rkastl 4923d 16h /
154 SdVerification:
- started sending with mailboxes		 rkastl 4923d 16h /
153 SdVerification:
further development, not done by far		 rkastl 4923d 16h /
152 SdClockMaster:
Generate InStrobe so that it the sd bus gets captured on the
rising edge of the clock in high speed mode		 rkastl 4923d 16h /
151 Verification:
+ redesign: not functional yet		 rkastl 4923d 16h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.