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Rev Log message Author Age Path
196 update to version 0.3 arniml 6855d 17h /
195 Suppress assertion of bus_read_bus_s when interrupt is pending.
This should fix bug report
"PROBLEM WHEN INT AND JMP"
arniml 6855d 20h /
194 initial check-in arniml 6855d 20h /
193 iManual arniml 6870d 22h /
192 update list for Wishbone toplevel arniml 6871d 09h /
191 preliminary version 0.2 arniml 6871d 12h /
190 finalize change log for release 0.6 beta arniml 6872d 07h /
189 add bug report
"Target address of JMP and CALL to Program Memory Bank 1 corrupted by interrupt"
arniml 6903d 09h /
188 move check for int_pending_s into ea_i_='0' branch
this fixes a glitch on PCH when an interrutp occurs
during external program memory fetch
arniml 6903d 09h /
187 Fix bug reports:
"Target address of JMP to Program Memory Bank 1 corrupted by interrupt"
"Return address of CALL to Program Memory Bank 1 corrupted by interrupt"
int_in_progress_o was active one cycle before int_pending_o is
asserted. this confused the mb multiplexer which determines the state of
the memory bank selection flag
arniml 6903d 09h /
186 update to version 0.2 arniml 6904d 11h /
185 initial check-in arniml 6909d 09h /
184 initial check-in arniml 6909d 10h /
183 fix missing assignment to outclock arniml 6909d 13h /
182 intermediate version arniml 6989d 11h /
181 fix typo arniml 6989d 14h /
180 introduce prefix 't48_' for wb_master entity and configuration arniml 6997d 20h /
179 introduce prefix 't48_' for all packages, entities and configurations arniml 6997d 20h /
178 Move latching of BUS to MSTATE2
-> sample BUS at the end of RD'
arniml 6999d 08h /
177 Implement db_dir_o glitch-safe arniml 6999d 08h /
176 Use en_clk_i instead of xtal3_s for generation of external signals.
This is required when the core runs with full xtal clock instead
of xtal/3 (xtal_div_3_g = 0).
arniml 6999d 08h /
175 add bug report
"MSB of Program Counter changed upon PC increment"
arniml 7000d 11h /
174 fix bug report
"MSB of Program Counter changed upon PC increment"
arniml 7000d 11h /
173 testcase for bug report
"MSB of Program Counter changed upon PC increment"
arniml 7000d 11h /
172 save data from wishbone bus in register bank with wb_ack
necessary to hold data from peripheral/memory until it is read by T48
arniml 7029d 08h /
171 remove obsolete output stack_high_o arniml 7030d 08h /
170 intermediate update arniml 7031d 14h /
169 initial check-in arniml 7031d 20h /
168 change address range of wb_master arniml 7031d 20h /
167 simplify address range:
- configuration range
- Wishbone range
arniml 7031d 20h /

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