URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 39

Rev	Log message	Author	Age	Path
39	initial check-in	arniml	7426d 20h	/
38	add measures to implement XCHD	arniml	7426d 20h	/
37	add dump_compare support	arniml	7426d 20h	/
36	make calculation of expected value more readable	arniml	7426d 21h	/
35	initial check-in	arniml	7429d 14h	/
34	fix test wrt AC	arniml	7432d 14h	/
33	rename pX_limp to pX_low_imp	arniml	7432d 15h	/
32	rename pX_limp to pX_low_imp	arniml	7432d 15h	/
31	refer PROJECT_DIR variable	arniml	7432d 15h	/
30	connect prog_n_o	arniml	7433d 13h	/
29	take auxiliary carry from direct ALU connection	arniml	7433d 13h	/
28	update wiring for DA support	arniml	7433d 13h	/
27	implemented mnemonic DA	arniml	7433d 13h	/
26	support for DA instruction	arniml	7433d 13h	/
25	initial check-in	arniml	7433d 13h	/
24	connect control signal for Port 2 expander	arniml	7433d 21h	/
23	rework Port 2 expander handling	arniml	7433d 21h	/
22	merge MN_ANLD, MN_MOVD_PP_A and MN_ORLD_PP_A to OUTLD_PP_A	arniml	7433d 21h	/
21	implement mnemonics: + MOVD_A_PP + OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A	arniml	7433d 21h	/
20	move code for PROG out of if-branch for xtal3_s	arniml	7433d 22h	/
19	enhance simulation result string	arniml	7435d 12h	/
18	fix constant format	arniml	7435d 12h	/
17	fix test	arniml	7435d 12h	/
16	fix header	arniml	7435d 12h	/
15	initial check-in	arniml	7436d 11h	/
14	initial check-in	arniml	7436d 12h	/
13	This commit was manufactured by cvs2svn to create tag 'transfer'.		7436d 12h	/
12	Imported sources	arniml	7436d 12h	/
11	add description	arniml	7436d 12h	/
10	put ext_ram on falling clock edge to sample the write enable proberly	arniml	7437d 11h	/