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Subversion Repositories t48

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Rev Log message Author Age Path
80 added if_timing arniml 7403d 03h /
79 add if_timing module arniml 7403d 03h /
78 adjust external timing of BUS arniml 7403d 03h /
77 move from std_logic_arith to numeric_std arniml 7403d 20h /
76 initial check-in arniml 7404d 00h /
75 remove obsolete design unit arniml 7404d 00h /
74 enhance pass/fail detection arniml 7404d 08h /
73 removed dummy_s - workaround not longer needed for GHDL 0.11.1 arniml 7404d 08h /
72 removed superfluous signal from sensitivity list arniml 7404d 08h /
71 add T8039 and its testbench arniml 7410d 00h /
70 clean test cell before make arniml 7410d 00h /
69 fix name of istrobe arniml 7410d 00h /
68 connect T0 and T1 to P1 arniml 7410d 00h /
67 initial check-in arniml 7410d 00h /
66 add temporary workaround for GHDL 0.11 arniml 7410d 00h /
65 clean up sensitivity list arniml 7410d 00h /
64 + enhance instruction strobe generation
+ rework address output under EA=1 conditions
arniml 7410d 01h /
63 reset machine state to MSTATE3 to allow proper instruction fetch
after reset
arniml 7410d 01h /
62 initial check-in arniml 7410d 01h /
61 expand script for dump compare arniml 7411d 21h /
60 + add marker for injected calls
+ suppress intstruction strobes for injected calls
arniml 7412d 21h /
59 increment prescaler with MSTATE4 arniml 7412d 21h /
58 add periodic interrupt arniml 7412d 21h /
57 abort if no interrupt occurs arniml 7412d 21h /
56 wait for instruction strobe after final end-of-simulation detection
this ensures that the last mov instruction is part of the dump and
enables 100% matching with i8039 simulator
arniml 7413d 23h /
55 add dependency to tb_behav_pack for decoder arniml 7413d 23h /
54 - add tb_istrobe_s arniml 7413d 23h /
53 make istrobe visible through testbench package arniml 7413d 23h /
52 + fix bug in PSW[3]
+ read SP properly for dump
arniml 7413d 23h /
51 + implement Port1 and Port2
+ connect T0 and T1
+ return proper program memory contents
arniml 7413d 23h /

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