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URL https://opencores.org/ocsvn/t51/t51/trunk

Subversion Repositories t51

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Rev Log message Author Age Path
48 *** empty log message *** andreas 6611d 00h /
47 updated t8052 core andreas 6611d 07h /
46 some updates andreas 6611d 07h /
45 *** empty log message *** andreas 6611d 07h /
44 some updates and bugfixes andreas 6611d 07h /
43 bugfix for interrupts at stalled instructions andreas 6694d 01h /
42 *** empty log message *** andreas 6712d 23h /
41 some updates andreas 6712d 23h /
40 *** empty log message *** andreas 6712d 23h /
39 some updates for T8032 andreas 6712d 23h /
38 some updates andreas 6722d 07h /
37 some updates andreas 6722d 07h /
36 some updates andreas 6722d 10h /
35 some updates andreas 6722d 10h /
34 bugfix for mode 0 andreas 6731d 02h /
33 bugfix for JBC instruction andreas 6743d 08h /
32 bugfix for two subsequent movx instructions andreas 6780d 03h /
31 update andreas 6866d 02h /
30 Made some bugfixes andreas 6867d 05h /
29 Removed UNISIM library jesus 7877d 08h /
28 Added -n option and component declaration jesus 7905d 06h /
27 Added Leonardo .ucf generation jesus 7905d 06h /
26 Updated for ISE 5.1 jesus 7912d 02h /
25 Fixed typo jesus 7921d 18h /
24 Fixed for ISE 5.1 jesus 7921d 18h /
23 Xilinx SSRAM, initial release jesus 7931d 20h /
22 Removed write through jesus 7959d 16h /
21 no message jesus 7959d 20h /
20 Added support for XST jesus 7986d 08h /
19 Updated for wishbone jesus 8054d 22h /

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