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Subversion Repositories usb_dongle_fpga

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Rev Log message Author Age Path
39 Added one more ByteBlaster II clone link and fixed close() to enable Cyclone FPGA again nuubik 5955d 09h /
38 bug fix on postcode displaying nuubik 5955d 13h /
37 Initial commit of EPCS1 (FPGA configuration memory) programmer to update dongle firmware nuubik 5955d 13h /
36 Initial commit of EPCS1 (FPGA configuration memory) programmet to update dongle firmware nuubik 5955d 13h /
35 Fixed postcode nibbles swapped issue added D0 D11 commands for IO port 0x88
(enable/disable memory reads)		 nuubik 5955d 13h /
34 For download of v5 dongle tool and manual nuubik 5957d 15h /
33 For download of v5 web release nuubik 5957d 15h /
32 For download of v5 datasheet nuubik 5957d 15h /
31 Newest available schematic nuubik 5958d 08h /
30 Fixed some typos in document nuubik 5958d 08h /
29 Added link to cheap ($40) ByteBlaster clone cable to update notice and fix'ed help typo nuubik 5958d 08h /
28 Quartus project files for HW code 5 project files nuubik 5959d 09h /
27 Initial commit of post code logger block and fifo used in the logger nuubik 5959d 09h /
26 Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output).
Added post code logger block and LPC IO write flow control and flash lock when flash is programmed		 nuubik 5959d 09h /
25 Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output).
Added 64K byte block read when read length is 0		 nuubik 5959d 09h /
24 Added changes for new dongle HW code 5 features nuubik 5959d 09h /
23 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed.
Forced serial port to hw flow control mode.
Added support for new dongle HW code 5 to support fast read and fast write modes		 nuubik 5959d 09h /
22 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed nuubik 5959d 09h /
21 This commit was manufactured by cvs2svn to create tag 'version_1_4'. 5972d 12h /
20 Fix'ed TAR cycle second part this is not critical update nuubik 5972d 12h /
19 Fix'ed cycle type init code copy/pase mistake nuubik 5972d 14h /
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 5973d 13h /
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 5973d 14h /
16 Synchronisation with OpenCores release nuubik 6106d 11h /
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6223d 13h /
14 added comment on POR time influence when booting from LPC dongle nuubik 6235d 12h /
13 This commit was manufactured by cvs2svn to create tag 'SoftVersion_1_1'. 6337d 06h /
12 Added windows py bindings check with nice info print with link to installer nuubik 6337d 06h /
11 one ; in line end possible runtime error nuubik 6337d 06h /
10 fixed a typo nuubik 6341d 04h /

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