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Rev Log message Author Age Path
43 Bug fix. Added file size check on write to make sure the file fits remainig space from offset. nuubik 5917d 17h /
42 Bug fix. Added file size check on write to make sure the file fits remainig space from offset. nuubik 5917d 17h /
41 Initial commit of 441104 PCB schematic nuubik 5947d 22h /
40 Added one more ByteBlaster II clone link and fixed close() to enable Cyclone FPGA again to update.py nuubik 5950d 17h /
39 Added one more ByteBlaster II clone link and fixed close() to enable Cyclone FPGA again nuubik 5950d 17h /
38 bug fix on postcode displaying nuubik 5950d 22h /
37 Initial commit of EPCS1 (FPGA configuration memory) programmer to update dongle firmware nuubik 5950d 22h /
36 Initial commit of EPCS1 (FPGA configuration memory) programmet to update dongle firmware nuubik 5950d 22h /
35 Fixed postcode nibbles swapped issue added D0 D11 commands for IO port 0x88
(enable/disable memory reads)		 nuubik 5950d 22h /
34 For download of v5 dongle tool and manual nuubik 5952d 23h /
33 For download of v5 web release nuubik 5953d 00h /
32 For download of v5 datasheet nuubik 5953d 00h /
31 Newest available schematic nuubik 5953d 16h /
30 Fixed some typos in document nuubik 5953d 16h /
29 Added link to cheap ($40) ByteBlaster clone cable to update notice and fix'ed help typo nuubik 5953d 17h /
28 Quartus project files for HW code 5 project files nuubik 5954d 17h /
27 Initial commit of post code logger block and fifo used in the logger nuubik 5954d 17h /
26 Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output).
Added post code logger block and LPC IO write flow control and flash lock when flash is programmed		 nuubik 5954d 17h /
25 Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output).
Added 64K byte block read when read length is 0		 nuubik 5954d 17h /
24 Added changes for new dongle HW code 5 features nuubik 5954d 17h /
23 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed.
Forced serial port to hw flow control mode.
Added support for new dongle HW code 5 to support fast read and fast write modes		 nuubik 5954d 17h /
22 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed nuubik 5954d 17h /
21 This commit was manufactured by cvs2svn to create tag 'version_1_4'. 5967d 20h /
20 Fix'ed TAR cycle second part this is not critical update nuubik 5967d 20h /
19 Fix'ed cycle type init code copy/pase mistake nuubik 5967d 22h /
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 5968d 21h /
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 5968d 22h /
16 Synchronisation with OpenCores release nuubik 6101d 19h /
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6218d 21h /
14 added comment on POR time influence when booting from LPC dongle nuubik 6230d 20h /

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