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Rev Log message Author Age Path
56 WB B4 RAM we fix unneback 4750d 00h /
55 added WB_B4RAM with byte enable unneback 4752d 07h /
54 added WB_B4RAM with byte enable unneback 4752d 07h /
53 added WB_B4RAM with byte enable unneback 4752d 07h /
52 added WB_B4RAM with byte enable unneback 4752d 07h /
51 added WB_B4RAM with byte enable unneback 4752d 07h /
50 added WB_B4RAM with byte enable unneback 4752d 08h /
49 added WB_B4RAM with byte enable unneback 4752d 08h /
48 wb updated unneback 4759d 02h /
47 added help program for LFSR counters unneback 4854d 05h /
46 updated parity unneback 4855d 06h /
45 updated timing in io models unneback 4857d 00h /
44 added target independet IO functionns unneback 4860d 00h /
43 added logic for parity generation and check unneback 4864d 04h /
42 updated mux_andor unneback 4868d 03h /
41 typo in registers.v unneback 4868d 05h /
40 new build environment with custom.v added as a result file unneback 4868d 05h /
39 added simple port prio based wb arbiter unneback 4869d 02h /
38 updated andor mux unneback 4869d 02h /
37 corrected polynom with length 20 unneback 4874d 23h /
36 added generic andor_mux unneback 4876d 07h /
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4876d 18h /
34 added vl_mux2_andor and vl_mux3_andor unneback 4876d 18h /
33 updated wb3wb3_bridge unneback 4889d 20h /
32 added vl_pll for ALTERA (cycloneIII) unneback 4897d 06h /
31 sync FIFO updated unneback 4917d 02h /
30 updated counter for level1 and level2 function unneback 4917d 02h /
29 updated counter for level1 and level2 function unneback 4917d 02h /
28 added sync simplex FIFO unneback 4918d 03h /
27 added sync simplex FIFO unneback 4918d 03h /

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