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Rev Log message Author Age Path
52 Oops, never before noticed that OC header is missing mihad 8053d 00h /
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 8053d 00h /
50 Got rid of undef directives mihad 8055d 16h /
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 8055d 16h /
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 8055d 16h /
47 Known issues repaired mihad 8055d 22h /
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 8060d 16h /
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 8061d 22h /
44 Added for testing of Configuration Cycles Type 1 mihad 8061d 22h /
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 8061d 22h /
42 Removed out of date files mihad 8073d 23h /
41 This commit was manufactured by cvs2svn to create tag 'rel_00'. 8152d 14h /
40 From these Wrod files PDF were created - added future improvements tadej 8152d 14h /
39 File not needed tadej 8152d 14h /
38 This file is not needed tadej 8152d 17h /
37 These files are not needed any more tadej 8152d 17h /
36 *** empty log message *** tadej 8152d 18h /
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8207d 01h /
34 Added missing include statements mihad 8222d 00h /
33 Added some testcases, removed un-needed fifo signals mihad 8222d 21h /

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