URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [.] - Rev 289

Rev	Log message	Author	Age	Path
289	This commit was manufactured by cvs2svn to create tag 'rel_1_1'.		5918d 23h	/.
288	updates for release 1.1	arniml	5918d 23h	/.
287	add notes on FPGA implementation	arniml	5918d 23h	/.
286	hierarchy update, RAM and ROM clarification	arniml	5919d 00h	/.
285	generate D for synchronous implementation in clocked process	arniml	5920d 01h	/.
284	better support for ISE/XST: opc_table and opc_decoder merged into decoder_pack and decoder	arniml	5920d 01h	/.
283	update to new mnemonic decoder	arniml	5920d 01h	/.
282	decouple bidir port T0 from P1 fixes testcase black_box/tx/t0	arniml	5921d 00h	/.
281	clarify testcase compilation	arniml	5921d 00h	/.
280	added syn directory structure	arniml	5921d 23h	/.
279	update	arniml	5936d 22h	/.
278	initial check-in	arniml	5937d 00h	/.
277	This commit was manufactured by cvs2svn to create tag 'rel_1_0'.		6417d 22h	/.
276	add change notes for release 1.0	arniml	6417d 22h	/.
275	fix sensitivity list	arniml	6418d 21h	/.
274	revision 1.0	arniml	6418d 21h	/.
273	reset counter_q	arniml	6436d 07h	/.
272	fix entity port names	arniml	6440d 09h	/.
271	initial check-in	arniml	6440d 09h	/.
270	fix component name	arniml	6440d 10h	/.