URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl/] - Rev 40

Rev	Log message	Author	Age	Path
40	added sigals for interacting with external ram	simont	8008d 00h	/8051/tags/rel_2/rtl
38	fix some bugs	simont	8014d 22h	/8051/tags/rel_2/rtl
37	added signals ack, stb and cyc	simont	8014d 22h	/8051/tags/rel_2/rtl
36	fix bugs in mode 0	simont	8014d 22h	/8051/tags/rel_2/rtl
32	overflow repaired	simont	8016d 02h	/8051/tags/rel_2/rtl
31	fix some bugs	simont	8022d 19h	/8051/tags/rel_2/rtl
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	8026d 01h	/8051/tags/rel_2/rtl
29	fix some bugs	simont	8026d 02h	/8051/tags/rel_2/rtl
28	remove syn signal	simont	8026d 02h	/8051/tags/rel_2/rtl
27	fix some bugs	simont	8026d 02h	/8051/tags/rel_2/rtl
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	8026d 04h	/8051/tags/rel_2/rtl
25	divider and multiplier pass test	markom	8026d 23h	/8051/tags/rel_2/rtl
23	mul & div use 4 clocks	simont	8027d 18h	/8051/tags/rel_2/rtl
22	fix some bugs	simont	8027d 18h	/8051/tags/rel_2/rtl
21	mul bug fixed	markom	8027d 23h	/8051/tags/rel_2/rtl
20	multiplier and divider changed so they complete in 4 cycles	markom	8028d 01h	/8051/tags/rel_2/rtl
19	combinatorial loop removed	simont	8028d 18h	/8051/tags/rel_2/rtl
17	fix some bugs	simont	8031d 23h	/8051/tags/rel_2/rtl
16	inputs ram and op2 removed	simont	8031d 23h	/8051/tags/rel_2/rtl
15	commbinatorial loop removed	simont	8031d 23h	/8051/tags/rel_2/rtl