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[/] [or1k/] [tags/] [rel-0-3-0-rc2] - Rev 204

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Rev Log message Author Age Path
204 Added function prototypes to stop gcc from complaining erez 8334d 18h /or1k/tags/rel-0-3-0-rc2
203 Updated from xess branch. lampret 8336d 07h /or1k/tags/rel-0-3-0-rc2
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf		 erez 8341d 15h /or1k/tags/rel-0-3-0-rc2
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8341d 15h /or1k/tags/rel-0-3-0-rc2
200 Initial import simons 8344d 22h /or1k/tags/rel-0-3-0-rc2
199 Initial import simons 8344d 23h /or1k/tags/rel-0-3-0-rc2
198 Moved from testbench.old simons 8347d 10h /or1k/tags/rel-0-3-0-rc2
197 This is not used any more. simons 8347d 10h /or1k/tags/rel-0-3-0-rc2
196 Configuration SPRs added. simons 8347d 11h /or1k/tags/rel-0-3-0-rc2
195 New test added. simons 8347d 11h /or1k/tags/rel-0-3-0-rc2
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8347d 19h /or1k/tags/rel-0-3-0-rc2
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8347d 19h /or1k/tags/rel-0-3-0-rc2
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8348d 04h /or1k/tags/rel-0-3-0-rc2
191 Added UART jitter var to sim config chris 8349d 01h /or1k/tags/rel-0-3-0-rc2
190 Added jitter initialization chris 8349d 01h /or1k/tags/rel-0-3-0-rc2
189 fixed mode handling for tick facility chris 8349d 01h /or1k/tags/rel-0-3-0-rc2
188 fixed PIC interrupt controller chris 8349d 01h /or1k/tags/rel-0-3-0-rc2
187 minor change to clear pending exception chris 8349d 01h /or1k/tags/rel-0-3-0-rc2
186 major change to UART structure chris 8349d 01h /or1k/tags/rel-0-3-0-rc2
185 major change to UART code chris 8349d 01h /or1k/tags/rel-0-3-0-rc2

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