OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_8/] [rtl] - Rev 73

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
73 Bug fixes, testcases added. mihad 7941d 20h /pci/tags/rel_8/rtl
72 *** empty log message *** mihad 7989d 00h /pci/tags/rel_8/rtl
71 Changed the code a bit to make it more readable.
Functionality not changed in any way.
More robust synchronization in fifos is still pending.
mihad 7996d 16h /pci/tags/rel_8/rtl
69 Changed BIST signal names etc.. mihad 8033d 23h /pci/tags/rel_8/rtl
68 Changed wrong signal name scanb_sen into scanb_en. tadejm 8037d 09h /pci/tags/rel_8/rtl
67 Changed BIST signals for RAMs. tadejm 8037d 13h /pci/tags/rel_8/rtl
66 Changed empty status generation in pciw_fifo_control.v mihad 8041d 00h /pci/tags/rel_8/rtl
65 Cleaned up non-blocking assignments in combinatinal logic statements mihad 8043d 22h /pci/tags/rel_8/rtl
63 Added additional testcase and changed rst name in BIST to trst mihad 8044d 02h /pci/tags/rel_8/rtl
62 Added BIST signals for RAMs. mihad 8046d 19h /pci/tags/rel_8/rtl
60 Added support for Virtual Silicon two port RAM. Didn't run regression on it yet! mihad 8054d 19h /pci/tags/rel_8/rtl
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 8054d 20h /pci/tags/rel_8/rtl
58 Removed all logic from asynchronous reset network mihad 8059d 20h /pci/tags/rel_8/rtl
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 8060d 02h /pci/tags/rel_8/rtl
56 Number of state bits define was removed mihad 8060d 17h /pci/tags/rel_8/rtl
55 Changed state machine encoding to true one-hot mihad 8060d 18h /pci/tags/rel_8/rtl
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 8093d 23h /pci/tags/rel_8/rtl
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 8094d 03h /pci/tags/rel_8/rtl
50 Got rid of undef directives mihad 8096d 19h /pci/tags/rel_8/rtl
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 8096d 19h /pci/tags/rel_8/rtl

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.