OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 138

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
118 change wr_sft to 2 bit wire. simont 7769d 01h /
117 Register oc8051_sfr dato output, add signal wait_data. simont 7769d 01h /
116 change sfr's interface. simont 7771d 02h /
115 change uart to meet timing. simont 7771d 04h /
114 remove t2mod register simont 7774d 07h /
113 signal prsc_ow added. simont 7774d 07h /
112 change timers to meet timing specifications (add divider with 12) simont 7774d 07h /
111 Remove instruction cache and wb_interface simont 7774d 22h /
110 change adr_i and adr_o length. simont 7774d 22h /
109 add `include "oc8051_defines.v" simont 7774d 22h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.