URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] - Rev 46

Rev	Log message	Author	Age	Path
26	Fixed minor synthesis bug.	sybreon	6289d 07h	/
25	Added code documentation. Improved size & speed of rtl/verilog/aeMB_aslu.v	sybreon	6289d 11h	/
24	Made minor performance optimisations.	sybreon	6289d 21h	/
23	Fixed minor simulation bug.	sybreon	6290d 13h	/
22	Added support for 8-bit and 16-bit data types.	sybreon	6290d 13h	/
21	Added hierarchy block diagram.	sybreon	6300d 19h	/
20	Added basic documentation doc/aeMB_datasheet.pdf	sybreon	6301d 09h	/
19	Added initial unified memory core.	sybreon	6302d 23h	/
18	Moved testbench into /sim/verilog. Simulation cleanups.	sybreon	6303d 15h	/
17	Cosmetic changes	sybreon	6304d 19h	/