URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] - Rev 45

Rev	Log message	Author	Age	Path
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7895d 02h	/
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7895d 02h	/
23	* empty log message *	rherveille	8022d 08h	/
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	8032d 13h	/
21	no message	rherveille	8118d 13h	/
20	Added Appendix A	rherveille	8118d 13h	/
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8122d 10h	/
18	no message	rherveille	8149d 06h	/
17	C-include file. Initial release	rherveille	8237d 10h	/
16	Changed PRER reset value from 0x0000 to 0xffff, conform specs.	rherveille	8249d 09h	/