URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] - Rev 321

Rev	Log message	Author	Age	Path
301	Adding actual task manager files	jshamlet	710d 21h	/
300	Adding core task manager assembly	jshamlet	710d 21h	/
299	Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling"	jshamlet	712d 21h	/
298	Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions.	jshamlet	714d 00h	/
297	Fixed register map comments	jshamlet	1004d 08h	/
296	Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd.	jshamlet	1013d 00h	/
295	Undoing previous revision. UART was fine, bug reporter was not.	jshamlet	1016d 03h	/
294	Fixed an ancient bug in the parity logic that had the parity inverted.	jshamlet	1016d 08h	/
293	Fixed formatting issue in o8_sync_serial where tabs were inserted instead of spaces and fixed column spacing as a result (purely cosmetic)	jshamlet	1035d 08h	/
292	Updated the o8_trig_delay entity by: 1) Added a global interrupt enable, 2) Added the ability to trigger on both the pre- and post-arm trigger input 3) Added the ability to read the external input on offset 7	jshamlet	1106d 07h	/