URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 443

Rev	Log message	Author	Age	Path
423	Minor typo fixed.	jeremybennett	4975d 04h	/
422	Separates out --force actions, so only build dirs corresponding to targets being built are blown away.	jeremybennett	4975d 04h	/
421	Fixing some typos in bld-all.sh's --help printout and changed all "cd .." lines to "cd -".	julius	4978d 02h	/
420	New feature to trace instructions (option --trace). Manual updated to match.	jeremybennett	4980d 00h	/
419	ORPmon: Fixed interrupt routines in reset.S so they are compatible with new GCC port (skip over redzone). Added some defines to easily switch what is done when an error vector is executed. Added ability to print out EPCR when crashing. Changed linker script back to one which doesn't skip over holes in SPI flash memories.	julius	4980d 03h	/
418	Or1ksim - adding new option when configuring memories, "exitnops"	julius	4980d 03h	/
417	ORPSoC re-adding doc automake files, this time not symlinks	julius	4983d 00h	/
416	ORPSoC doc cleanup - removing symlinks from automake'd docs build path	julius	4983d 00h	/
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	4983d 00h	/
414	Updates to add -mredzone and improved GCC optimizations.	jeremybennett	4983d 19h	/