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40 This adds to dumpsdram the capability to run over a port, such as with
busmaster_tb.
dgisselq 3033d 22h /
39 An attempt at a bugfix. We'll see if this works any better downstream. dgisselq 3035d 17h /
38 Updated to remove the build dependence upon ZipCPU. dgisselq 3035d 21h /
37 These fixes were necessary to get the SDRAM into a working simulation
capability. It is finally what it was supposed to be: cycle accurate. Sadly,
to do this, I did need to make a subtle change to rtl/wbsdram.v. (I was having
a problem with external input clocking in Verilator. This fixes it--but its
a Verilator only change--to rtl/wbsdram.v that is.)
dgisselq 3036d 15h /
36 A linker script, appropriate to the XuLA25-LX25 SoC. dgisselq 3036d 16h /
35 Updates the memory testing program to work successfully with the Gnu build
tools--particularly the GNU C-preprocessor from GCC and the GNU assembler from
Binutils.
dgisselq 3036d 16h /
34 Bug fix: This sets as a positive voltage bias (not negative) the maximum
value of 0x07fff, where as the negative maximum value of 0x08000 properly
(now) reflects nearly ground--as one would desire. (Last time around I had
these backwards.)
dgisselq 3040d 11h /
33 Oops -- the audio was wired audio first then the interrupt controller, not
the other way around. This adjusts regdefs to match what's on the chip.
dgisselq 3040d 13h /
32 Just noticed that the timer was fixed on this. This change adjusts the
timer to support audio at a user selectable rate.
dgisselq 3040d 13h /
31 A bug fix, although one that rearranges the bus. The first four I/O locations
have been adjusted. The new locations are reflected in wishbone.html. In
addition, the PWM and UART devices no longer create bus errors when accessed.
Finally, this version uses a `define XULA25 to determine whether or not to build
for the XuLA2-LX9 or the XuLA2-LX25. If defined, it will build for the
XuLA2-LX25. If not, for the XuLA2-LX9. The ideal location for this define
would be to place it into your Xilinx configuration, should you wish to build
for the LX25.
dgisselq 3040d 14h /

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