OpenCores
URL https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk

Subversion Repositories xulalx25soc

[/] - Rev 64

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
44 NELM parameter adjusted to reflect the maximum number of lines the compressed
scope can handle: 31, not 32.
dgisselq 3032d 11h /
43 Commentary changes only, no substance. dgisselq 3032d 11h /
42 Minor changes. dgisselq 3032d 11h /
41 Bug fix. This was preventing dumpsdram from accurately reading back what
had been written to the RAM earlier.
dgisselq 3032d 11h /
40 This adds to dumpsdram the capability to run over a port, such as with
busmaster_tb.
dgisselq 3033d 22h /
39 An attempt at a bugfix. We'll see if this works any better downstream. dgisselq 3035d 17h /
38 Updated to remove the build dependence upon ZipCPU. dgisselq 3035d 21h /
37 These fixes were necessary to get the SDRAM into a working simulation
capability. It is finally what it was supposed to be: cycle accurate. Sadly,
to do this, I did need to make a subtle change to rtl/wbsdram.v. (I was having
a problem with external input clocking in Verilator. This fixes it--but its
a Verilator only change--to rtl/wbsdram.v that is.)
dgisselq 3036d 15h /
36 A linker script, appropriate to the XuLA25-LX25 SoC. dgisselq 3036d 17h /
35 Updates the memory testing program to work successfully with the Gnu build
tools--particularly the GNU C-preprocessor from GCC and the GNU assembler from
Binutils.
dgisselq 3036d 17h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.