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[/] [.] - Rev 161

Rev	Log message	Author	Age	Path
141	Core improved to pass all tests with the Bosch VHDL Reference system.	igorm	7326d 00h	/.
140	I forgot to thange one signal name.	igorm	7380d 23h	/.
139	Signal bus_off_on added.	igorm	7380d 23h	/.
138	Header changed. Address latched to posedge. bus_off_on signal added.	mohor	7420d 02h	/.
137	Header changed.	mohor	7420d 02h	/.
136	Error counters changed.	mohor	7420d 02h	/.
135	Header changed.	mohor	7420d 02h	/.
134	Active high/low problem when Altera devices are used. Bug fixed by Rojhalat Ibrahim.	mohor	7528d 00h	/.
133	This commit was manufactured by cvs2svn to create tag 'rel_19'.		7534d 11h	/.
132	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		7534d 11h	/.