URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [.] - Rev 45

Rev	Log message	Author	Age	Path
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7921d 17h	/.
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7921d 17h	/.
23	* empty log message *	rherveille	8048d 23h	/.
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	8059d 04h	/.
21	no message	rherveille	8145d 05h	/.
20	Added Appendix A	rherveille	8145d 05h	/.
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8149d 01h	/.
18	no message	rherveille	8175d 21h	/.
17	C-include file. Initial release	rherveille	8264d 01h	/.
16	Changed PRER reset value from 0x0000 to 0xffff, conform specs.	rherveille	8276d 01h	/.