URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_1/] [rtl/] - Rev 142

Rev	Log message	Author	Age	Path
117	Register oc8051_sfr dato output, add signal wait_data.	simont	7793d 20h	/8051/tags/rel_1/rtl
116	change sfr's interface.	simont	7795d 20h	/8051/tags/rel_1/rtl
115	change uart to meet timing.	simont	7795d 22h	/8051/tags/rel_1/rtl
114	remove t2mod register	simont	7799d 01h	/8051/tags/rel_1/rtl
113	signal prsc_ow added.	simont	7799d 01h	/8051/tags/rel_1/rtl
112	change timers to meet timing specifications (add divider with 12)	simont	7799d 01h	/8051/tags/rel_1/rtl
110	change adr_i and adr_o length.	simont	7799d 16h	/8051/tags/rel_1/rtl
109	add `include "oc8051_defines.v"	simont	7799d 16h	/8051/tags/rel_1/rtl
108	fix some bugs, use oc8051_cache_ram.	simont	7799d 16h	/8051/tags/rel_1/rtl
107	Include instruction cache.	simont	7799d 16h	/8051/tags/rel_1/rtl