OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [rtl] - Rev 179

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
141 remove define OC8051_AS2_PCL, chane signal src_sel2 to 2 bit wide. simont 7735d 04h /8051/tags/rel_12/rtl
140 cahnge assigment to pc_wait (remove istb_o) simont 7735d 04h /8051/tags/rel_12/rtl
139 add aditional alu destination to solve critical path. simont 7735d 22h /8051/tags/rel_12/rtl
138 Change buffering to save one clock per instruction. simont 7735d 22h /8051/tags/rel_12/rtl
137 change to fit xrom. simont 7736d 03h /8051/tags/rel_12/rtl
136 registering outputs. simont 7736d 03h /8051/tags/rel_12/rtl
135 prepared start of receiving if ren is not active. simont 7742d 03h /8051/tags/rel_12/rtl
134 fix bug in case execution of two data dependent instructions. simont 7742d 03h /8051/tags/rel_12/rtl
133 fix bug in substraction. simont 7742d 05h /8051/tags/rel_12/rtl
132 change branch instruction execution (reduse needed clock periods). simont 7745d 21h /8051/tags/rel_12/rtl

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.