URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl] - Rev 112

Rev	Log message	Author	Age	Path
77	substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel	simont	7923d 10h	/8051/tags/rel_2/rtl
76	add module oc8051_sfr, 256 bytes internal ram	simont	7923d 10h	/8051/tags/rel_2/rtl
75	initial import	simont	7923d 10h	/8051/tags/rel_2/rtl
73	initial import	simont	7931d 10h	/8051/tags/rel_2/rtl
72	fix bug in interface to external data ram	simont	7931d 12h	/8051/tags/rel_2/rtl
67	add parameters for instruction cache	simont	7935d 14h	/8051/tags/rel_2/rtl
62	fix bugs in instruction interface	simont	7936d 10h	/8051/tags/rel_2/rtl
54	cahnge interface to instruction rom	simont	7942d 08h	/8051/tags/rel_2/rtl
47	remove unused files	simont	7959d 10h	/8051/tags/rel_2/rtl
46	prepared header	simont	7959d 10h	/8051/tags/rel_2/rtl