URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl] - Rev 117

Rev	Log message	Author	Age	Path
87	add include oc8051_defines.v	simont	7919d 07h	/8051/tags/rel_2/rtl
82	replace some modules	simont	7927d 07h	/8051/tags/rel_2/rtl
81	initial import	simont	7927d 07h	/8051/tags/rel_2/rtl
80	removing unused modules	simont	7927d 07h	/8051/tags/rel_2/rtl
78	alu with registered outputs	simont	7987d 07h	/8051/tags/rel_2/rtl
77	substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel	simont	7996d 04h	/8051/tags/rel_2/rtl
76	add module oc8051_sfr, 256 bytes internal ram	simont	7996d 04h	/8051/tags/rel_2/rtl
75	initial import	simont	7996d 04h	/8051/tags/rel_2/rtl
73	initial import	simont	8004d 04h	/8051/tags/rel_2/rtl
72	fix bug in interface to external data ram	simont	8004d 06h	/8051/tags/rel_2/rtl