OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl] - Rev 148

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
122 deifne OC8051_ROM added simont 7766d 04h /8051/tags/rel_2/rtl
121 Change pc add value from 23'h to 16'h simont 7766d 04h /8051/tags/rel_2/rtl
120 defines for pherypherals added simont 7767d 02h /8051/tags/rel_2/rtl
119 remove signal sbuf_txd [12:11] simont 7767d 05h /8051/tags/rel_2/rtl
118 change wr_sft to 2 bit wire. simont 7767d 22h /8051/tags/rel_2/rtl
117 Register oc8051_sfr dato output, add signal wait_data. simont 7767d 23h /8051/tags/rel_2/rtl
116 change sfr's interface. simont 7769d 23h /8051/tags/rel_2/rtl
115 change uart to meet timing. simont 7770d 01h /8051/tags/rel_2/rtl
114 remove t2mod register simont 7773d 04h /8051/tags/rel_2/rtl
113 signal prsc_ow added. simont 7773d 04h /8051/tags/rel_2/rtl

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.