URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [rtl] - Rev 50

Rev	Log message	Author	Age	Path
18	Moved testbench into /sim/verilog. Simulation cleanups.	sybreon	6331d 17h	/aemb/trunk/rtl
17	Cosmetic changes	sybreon	6332d 20h	/aemb/trunk/rtl
16	Added pipeline stalling from incomplete bus cycles. Separated sync and async portions of code.	sybreon	6333d 08h	/aemb/trunk/rtl
14	Added initial interrupt/exception support.	sybreon	6339d 23h	/aemb/trunk/rtl
11	Removed unused signals	sybreon	6340d 07h	/aemb/trunk/rtl
10	Fixed minor bugs	sybreon	6340d 07h	/aemb/trunk/rtl
9	Extended testbench code	sybreon	6340d 07h	/aemb/trunk/rtl
8	Fixed memory read-write data hazard	sybreon	6340d 07h	/aemb/trunk/rtl
7	Added CMP instruction	sybreon	6340d 07h	/aemb/trunk/rtl
5	Fixed endian correction issues on data bus.	sybreon	6340d 22h	/aemb/trunk/rtl