URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [rtl] - Rev 61

Rev	Log message	Author	Age	Path
25	Added code documentation. Improved size & speed of rtl/verilog/aeMB_aslu.v	sybreon	6288d 12h	/aemb/trunk/rtl
24	Made minor performance optimisations.	sybreon	6288d 22h	/aemb/trunk/rtl
23	Fixed minor simulation bug.	sybreon	6289d 13h	/aemb/trunk/rtl
22	Added support for 8-bit and 16-bit data types.	sybreon	6289d 14h	/aemb/trunk/rtl
19	Added initial unified memory core.	sybreon	6301d 23h	/aemb/trunk/rtl
18	Moved testbench into /sim/verilog. Simulation cleanups.	sybreon	6302d 16h	/aemb/trunk/rtl
17	Cosmetic changes	sybreon	6303d 20h	/aemb/trunk/rtl
16	Added pipeline stalling from incomplete bus cycles. Separated sync and async portions of code.	sybreon	6304d 08h	/aemb/trunk/rtl
14	Added initial interrupt/exception support.	sybreon	6310d 22h	/aemb/trunk/rtl
11	Removed unused signals	sybreon	6311d 06h	/aemb/trunk/rtl