URL https://opencores.org/ocsvn/can/can/trunk

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[/] [can/] [trunk/] [rtl/] - Rev 161

Rev	Log message	Author	Age	Path
126	Error counters fixed to be compatible with Bosch VHDL reference model. Small synchronization changes.	mohor	7621d 13h	/can/trunk/rtl
125	Synchronization changed, error counters fixed.	mohor	7625d 19h	/can/trunk/rtl
124	ALTERA_RAM supported.	mohor	7646d 01h	/can/trunk/rtl
121	When detecting bus-free, signal bus_free_cnt_en was cleared to zero although the last sampled bit was zero instead of one.	mohor	7653d 07h	/can/trunk/rtl
118	Artisan RAM fixed (when not using BIST).	mohor	7662d 04h	/can/trunk/rtl
117	Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need to be joined together on higher level.	mohor	7662d 04h	/can/trunk/rtl
115	Artisan ram instances added.	simons	7667d 22h	/can/trunk/rtl
112	Tx and rx length are limited to 8 bytes regardless to the DLC value.	tadejm	7694d 23h	/can/trunk/rtl
111	Fixed according to the linter. Case statement for data_out joined.	mohor	7696d 23h	/can/trunk/rtl
110	Fixed according to the linter.	mohor	7696d 23h	/can/trunk/rtl