URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [highland_ver1/] [bench/] - Rev 117

Rev	Log message	Author	Age	Path
80	New version of the debug interface. Not finished, yet.	mohor	7534d 09h	/dbg_interface/tags/highland_ver1/bench
75	Simulation files.	mohor	7595d 07h	/dbg_interface/tags/highland_ver1/bench
73	CRC logic changed.	mohor	7595d 07h	/dbg_interface/tags/highland_ver1/bench
63	Three more chains added for cpu debug access.	simons	7651d 10h	/dbg_interface/tags/highland_ver1/bench
47	mon_cntl_o signals that controls monitor mux added.	mohor	8129d 09h	/dbg_interface/tags/highland_ver1/bench
38	Few outputs for boundary scan chain added.	mohor	8185d 09h	/dbg_interface/tags/highland_ver1/bench
36	Structure changed. Hooks for jtag chain added.	mohor	8189d 08h	/dbg_interface/tags/highland_ver1/bench
17	dbg_timescale.v changed to timescale.v This is done for the simulation of few different cores in a single project.	mohor	8329d 12h	/dbg_interface/tags/highland_ver1/bench
15	bs_chain_o added.	mohor	8331d 13h	/dbg_interface/tags/highland_ver1/bench
13	Signal names changed to lowercase.	mohor	8332d 13h	/dbg_interface/tags/highland_ver1/bench