URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_15/] [rtl/] [verilog/] - Rev 158

Rev	Log message	Author	Age	Path
83	Small fix.	mohor	7541d 07h	/dbg_interface/tags/rel_15/rtl/verilog
82	New directory structure. New version of the debug interface.	mohor	7541d 07h	/dbg_interface/tags/rel_15/rtl/verilog
81	New directory structure. New version of the debug interface. Files that are not needed removed.	mohor	7541d 07h	/dbg_interface/tags/rel_15/rtl/verilog
77	MBIST chain connection fixed.	mohor	7602d 04h	/dbg_interface/tags/rel_15/rtl/verilog
73	CRC logic changed.	mohor	7602d 06h	/dbg_interface/tags/rel_15/rtl/verilog
71	Mbist support added.	simons	7604d 13h	/dbg_interface/tags/rel_15/rtl/verilog
67	Lower two address lines must be always zero.	simons	7637d 09h	/dbg_interface/tags/rel_15/rtl/verilog
65	WB_CNTL register added, some syncronization fixes.	simons	7638d 08h	/dbg_interface/tags/rel_15/rtl/verilog
63	Three more chains added for cpu debug access.	simons	7658d 09h	/dbg_interface/tags/rel_15/rtl/verilog
61	Lapsus fixed.	simons	7686d 09h	/dbg_interface/tags/rel_15/rtl/verilog