URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_19/] [bench] - Rev 111

Rev	Log message	Author	Age	Path
36	Structure changed. Hooks for jtag chain added.	mohor	8166d 22h	/dbg_interface/tags/rel_19/bench
17	dbg_timescale.v changed to timescale.v This is done for the simulation of few different cores in a single project.	mohor	8307d 02h	/dbg_interface/tags/rel_19/bench
15	bs_chain_o added.	mohor	8309d 03h	/dbg_interface/tags/rel_19/bench
13	Signal names changed to lowercase.	mohor	8310d 04h	/dbg_interface/tags/rel_19/bench
12	Wishbone interface added, few fixes for better performance, hooks for boundary scan testing added.	mohor	8311d 04h	/dbg_interface/tags/rel_19/bench
11	Changes connected to the OpenRISC access (SPR read, SPR write).	mohor	8332d 00h	/dbg_interface/tags/rel_19/bench
9	Working version. Few bugs fixed, comments added.	mohor	8336d 04h	/dbg_interface/tags/rel_19/bench
6	Minor changes for simulation.	mohor	8337d 02h	/dbg_interface/tags/rel_19/bench
5	Trace fixed. Some registers changed, trace simplified.	mohor	8337d 23h	/dbg_interface/tags/rel_19/bench
2	Initial official release.	mohor	8343d 00h	/dbg_interface/tags/rel_19/bench