URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_19] - Rev 44

Rev	Log message	Author	Age	Path
24	CRC changed so more thorough testing is done.	mohor	8258d 23h	/dbg_interface/tags/rel_19
23	Trace disabled by default.	mohor	8265d 01h	/dbg_interface/tags/rel_19
22	Register length fixed.	mohor	8265d 01h	/dbg_interface/tags/rel_19
21	CRC is returned when chain selection data is transmitted.	mohor	8265d 21h	/dbg_interface/tags/rel_19
20	Crc generation is different for read or write commands. Small synthesys fixes.	mohor	8267d 00h	/dbg_interface/tags/rel_19
19	Wishbone data latched on wb_clk_i instead of risc_clk.	mohor	8279d 01h	/dbg_interface/tags/rel_19
18	Reset signals are not combined any more.	mohor	8281d 10h	/dbg_interface/tags/rel_19
17	dbg_timescale.v changed to timescale.v This is done for the simulation of few different cores in a single project.	mohor	8304d 23h	/dbg_interface/tags/rel_19
16	bs_chain_o port added.	mohor	8306d 23h	/dbg_interface/tags/rel_19
15	bs_chain_o added.	mohor	8307d 00h	/dbg_interface/tags/rel_19