URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_21/] [rtl/] - Rev 92

Rev	Log message	Author	Age	Path
52	Trst signal is not inverted here any more. Inverted on higher layer !!!.	mohor	7980d 05h	/dbg_interface/tags/rel_21/rtl
51	WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated.	mohor	8007d 16h	/dbg_interface/tags/rel_21/rtl
47	mon_cntl_o signals that controls monitor mux added.	mohor	8163d 04h	/dbg_interface/tags/rel_21/rtl
46	Asynchronous reset used instead of synchronous.	mohor	8171d 10h	/dbg_interface/tags/rel_21/rtl
45	tdo_padoen_o changed to tdo_padoe_o. Signal is active high.	mohor	8178d 06h	/dbg_interface/tags/rel_21/rtl
44	Signal names changed to lower case.	mohor	8178d 06h	/dbg_interface/tags/rel_21/rtl
43	Intentional error removed.	mohor	8183d 06h	/dbg_interface/tags/rel_21/rtl
42	A block for checking possible simulation/synthesis missmatch added.	mohor	8183d 08h	/dbg_interface/tags/rel_21/rtl
41	Function changed to logic because of some synthesis warnings.	mohor	8191d 05h	/dbg_interface/tags/rel_21/rtl
40	Signal tdo_padoe_o changed back to tdo_padoen_o.	mohor	8205d 05h	/dbg_interface/tags/rel_21/rtl