URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rev_23] - Rev 95

Rev	Log message	Author	Age	Path
71	Mbist support added.	simons	7603d 22h	/dbg_interface/tags/rev_23
70	A pdf copy of existing doc document.	simons	7611d 00h	/dbg_interface/tags/rev_23
69	WBCNTL added, multiple CPU support described.	simons	7631d 13h	/dbg_interface/tags/rev_23
67	Lower two address lines must be always zero.	simons	7636d 18h	/dbg_interface/tags/rev_23
65	WB_CNTL register added, some syncronization fixes.	simons	7637d 17h	/dbg_interface/tags/rev_23
63	Three more chains added for cpu debug access.	simons	7657d 18h	/dbg_interface/tags/rev_23
61	Lapsus fixed.	simons	7685d 18h	/dbg_interface/tags/rev_23
59	Reset value for riscsel register set to 1.	simons	7685d 18h	/dbg_interface/tags/rev_23
57	Multiple cpu support added.	simons	7685d 19h	/dbg_interface/tags/rev_23
56	Revision 1.6. Trst changed to active high !!!. In order to be compliant with the standard, reset needs to be negated on the upper layer.	mohor	7952d 16h	/dbg_interface/tags/rev_23