URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] - Rev 352

Rev	Log message	Author	Age	Path
312	Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16.	tadejm	7493d 18h	/ethmac/branches/unneback/rtl/verilog
306	Lapsus fixed (!we -> ~we).	simons	7494d 15h	/ethmac/branches/unneback/rtl/verilog
304	WISHBONE slave changed and tested from only 32-bit accesss to byte access.	tadejm	7516d 12h	/ethmac/branches/unneback/rtl/verilog
302	mbist signals updated according to newest convention	markom	7542d 22h	/ethmac/branches/unneback/rtl/verilog
301	Update RxEnSync only when mrxdv_pad_i is inactive (LOW).	knguyen	7553d 15h	/ethmac/branches/unneback/rtl/verilog
297	Artisan ram instance added.	simons	7606d 14h	/ethmac/branches/unneback/rtl/verilog
288	This file was not part of the RTL before, but it should be here.	simons	7642d 15h	/ethmac/branches/unneback/rtl/verilog
286	Define file in eth_cop.v is changed to eth_defines.v. Some defines were moved from tb_eth_defines.v to eth_defines.v.	mohor	7668d 18h	/ethmac/branches/unneback/rtl/verilog
285	Binary operator used instead of unary (xnor).	mohor	7668d 19h	/ethmac/branches/unneback/rtl/verilog
284	Busy was set 2 cycles too late. Reported by Dennis Scott.	mohor	7696d 20h	/ethmac/branches/unneback/rtl/verilog