URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

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[/] [ethmac/] [tags/] [rel_12/] [rtl/] [verilog/] [eth_top.v] - Rev 253

Rev	Log message	Author	Age	Path
76	Interrupts changed in the top file	mohor	8122d 19h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
70	Small fixes.	mohor	8131d 00h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
68	Registered trimmed. Unused registers removed.	mohor	8132d 21h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
67	EXTERNAL_DMA used instead of WISHBONE_DMA.	mohor	8132d 22h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
65	Testbench fixed, code simplified, unused signals removed.	mohor	8133d 04h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
63	RxAbort is connected differently.	mohor	8133d 21h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
59	Changes that were lost when updating from 1.11 to 1.14 fixed.	mohor	8134d 00h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
52	Modified for Address Checking, addition of eth_addrcheck.v	billditt	8134d 15h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
47	HASH0 and HASH1 registers added. Registers address width was changed to 8 bits.	mohor	8136d 18h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v
43	Tx status is written back to the BD.	mohor	8138d 02h	/ethmac/tags/rel_12/rtl/verilog/eth_top.v