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[/] [ethmac/] [tags/] [rel_14/] [bench/] [verilog] - Rev 194

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116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 8013d 20h /ethmac/tags/rel_14/bench/verilog
108 Testbench supports unaligned accesses. mohor 8091d 00h /ethmac/tags/rel_14/bench/verilog
107 TX_BUF_BASE changed. mohor 8091d 00h /ethmac/tags/rel_14/bench/verilog
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8135d 22h /ethmac/tags/rel_14/bench/verilog
80 Small fixes for external/internal DMA missmatches. mohor 8156d 17h /ethmac/tags/rel_14/bench/verilog
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8166d 21h /ethmac/tags/rel_14/bench/verilog
66 Testbench fixed, code simplified, unused signals removed. mohor 8167d 03h /ethmac/tags/rel_14/bench/verilog
51 Added separate tests for Multicast, Unicast, Broadcast billditt 8168d 14h /ethmac/tags/rel_14/bench/verilog
49 HASH0 and HASH1 register read/write added. mohor 8170d 14h /ethmac/tags/rel_14/bench/verilog
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8176d 20h /ethmac/tags/rel_14/bench/verilog

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