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[/] [ethmac/] [tags/] [rel_18/] - Rev 162

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139 Synchronous reset added to all registers. Defines used for width. r_MiiMRst
changed from bit position 10 to 9.
mohor 8021d 12h /ethmac/tags/rel_18
138 Synchronous reset added. mohor 8021d 12h /ethmac/tags/rel_18
137 Defines for register width added. mii_rst signal in MIIMODER register
changed.
mohor 8021d 12h /ethmac/tags/rel_18
136 Parameter ResetValue changed to capital letters. mohor 8021d 22h /ethmac/tags/rel_18
135 New revision. External DMA removed, TX_BD_NUM changed. mohor 8023d 14h /ethmac/tags/rel_18
134 Register TX_BD_NUM is changed so it contains value of the Tx buffer descriptors. No
need to multiply or devide any more.
mohor 8023d 15h /ethmac/tags/rel_18
133 - Busy signal was not set on time when scan status operation was performed
and clock was divided with more than 2.
- Nvalid remains valid two more clocks (was previously cleared too soon).
mohor 8023d 16h /ethmac/tags/rel_18
132 LinkFailRegister is reflecting the status of the PHY's link fail status bit. mohor 8023d 16h /ethmac/tags/rel_18
131 LinkFail signal was not latching appropriate bit. mohor 8023d 16h /ethmac/tags/rel_18
130 First draft of the Ethernet design document. Not a finished version. Still many
things missing.
mohor 8023d 16h /ethmac/tags/rel_18

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