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163 Another temporary version. Core is almost finished. Testbench not included,
yet"		 mohor 7941d 21h /ethmac/tags/rel_18
162 Another temporary version. Core is almost finished. Testbench not included,
yet.		 mohor 7941d 21h /ethmac/tags/rel_18
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.		 mohor 7942d 03h /ethmac/tags/rel_18
160 error acknowledge cycle termination added to display. mohor 7942d 03h /ethmac/tags/rel_18
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.		 mohor 7942d 23h /ethmac/tags/rel_18
158 Typo fixed. mohor 7942d 23h /ethmac/tags/rel_18
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7945d 05h /ethmac/tags/rel_18
156 Valid testbench. mohor 7945d 05h /ethmac/tags/rel_18
155 Minor changes. mohor 7945d 05h /ethmac/tags/rel_18
154 Design document is still under construction. mohor 7946d 04h /ethmac/tags/rel_18

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