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Rev Log message Author Age Path
211 Bist added. mohor 7931d 14h /ethmac/tags/rel_18
210 BIST added. mohor 7931d 14h /ethmac/tags/rel_18
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7932d 17h /ethmac/tags/rel_18
208 Virtual Silicon RAMs moved to lib directory tadej 7948d 11h /ethmac/tags/rel_18
207 Virtual Silicon RAM support fixed tadej 7948d 11h /ethmac/tags/rel_18
206 Virtual Silicon RAM added to the simulation. mohor 7948d 11h /ethmac/tags/rel_18
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7948d 12h /ethmac/tags/rel_18
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7948d 12h /ethmac/tags/rel_18
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.		 mohor 7948d 12h /ethmac/tags/rel_18
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.		 mohor 7951d 13h /ethmac/tags/rel_18

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