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[/] [ethmac/] [tags/] [rel_4/] [rtl/] [verilog/] - Rev 335

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Rev Log message Author Age Path
127 WriteRxDataToMemory signal changed so end of frame (when last word is
written to fifo) is changed.
mohor 8004d 00h /ethmac/tags/rel_4/rtl/verilog
126 InvalidSymbol generation changed. mohor 8004d 00h /ethmac/tags/rel_4/rtl/verilog
125 RxAbort changed. Packets received with MRxErr (from PHY) are also
aborted.
mohor 8004d 00h /ethmac/tags/rel_4/rtl/verilog
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 8006d 02h /ethmac/tags/rel_4/rtl/verilog
120 Unused files removed. mohor 8006d 03h /ethmac/tags/rel_4/rtl/verilog
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 8006d 03h /ethmac/tags/rel_4/rtl/verilog
118 ShiftEnded synchronization changed. mohor 8009d 18h /ethmac/tags/rel_4/rtl/verilog
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8011d 02h /ethmac/tags/rel_4/rtl/verilog
114 EXTERNAL_DMA removed. External DMA not supported. mohor 8012d 00h /ethmac/tags/rel_4/rtl/verilog
113 RxPointer bug fixed. mohor 8018d 16h /ethmac/tags/rel_4/rtl/verilog

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