URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_7/] [rtl/] [verilog/] [eth_wishbone.v] - Rev 150

Rev	Log message	Author	Age	Path
80	Small fixes for external/internal DMA missmatches.	mohor	8152d 10h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
77	Interrupts changed	mohor	8152d 10h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
64	Status was not written correctly when frames were discarted because of address mismatch.	mohor	8163d 10h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
61	RxStartFrm cleared when abort or retry comes.	mohor	8163d 14h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
60	Changes that were lost when updating from 1.5 to 1.8 fixed.	mohor	8163d 15h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
54	Addition of new module eth_addrcheck.v	billditt	8164d 06h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
48	RxOverRun added to statuses.	mohor	8166d 10h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
43	Tx status is written back to the BD.	mohor	8167d 17h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
42	Rx status is written back to the BD.	mohor	8170d 10h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v
41	non-DMA host interface added. Select the right configutation in eth_defines.	mohor	8172d 13h	/ethmac/tags/rel_7/rtl/verilog/eth_wishbone.v