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[/] [fade_ether_protocol/] [trunk/] - Rev 49

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29 Fixed two mistakes in mutex management (mutex not unlocked, when function leaved after an error)
Fixed dead URL in comments.
wzab 3434d 06h /fade_ether_protocol/trunk
28 Correction of an obvious mistake in the Linux driver, which lead to deadlock
when two applications (or two threads) tried to open the same FADE device.
wzab 3438d 04h /fade_ether_protocol/trunk
27 Added file fade_one_channel, allowing to implement multiple FADE instances in a single FPGA. wzab 3452d 13h /fade_ether_protocol/trunk
26 Corrected small bug in CRC update in eth_sender8,vhd
Added counter of retransmitted packets.
Some minor changes in delay update parameters.
wzab 3486d 23h /fade_ether_protocol/trunk
25 Modified the Tcl script for KC705 so, that it automatically runs synthesis, implementation and generates bitstream. wzab 3510d 14h /fade_ether_protocol/trunk
24 Added build scripts for KC705 (somehow they got omitted in version 22) wzab 3511d 03h /fade_ether_protocol/trunk
23 Added script allowing for batch compilation of FADE 10G for Atlys.
Just run build_proj_atlys.sh

Removed compilation of receiver2.c (which has been deleted) in the Makefile.
Slightly changed order of operation in the receiver2t.c
wzab 3511d 03h /fade_ether_protocol/trunk
22 Sources reorganized so, that each ".xci" is in a separate directory.
Added script for rebuilding of Vivado project for KC705.
Just run the build_proj_kc705 script, and the project
will be created as kc705_10g3.xpr in the kc705_10g3 drirectory.
You can open it later on in Vivado 2014.3 and build the bitstream.
wzab 3511d 04h /fade_ether_protocol/trunk
21 Changed the top entity for KC705, so that the FADE core is correctly reset
by the RESETMAC command.
Changed sending of the FCMD_RESET command form driver to the FPGA (as it
is not confirmed - the reinitialized core can't confirm the command).
Changed the receiver2t demo program so that it sends RESETMAC three times
before the transmission is started.

In the future, probably there should be a STATUS ioctl, which would
verify, that the core has been reset by RESETMAC.
Then the program should send RESETMAC, and afterwards read the STATUS,
verifying, that RESETMAC arrived FPGA. If not it should repeat the
above procedure (not implemented yet).
wzab 3511d 10h /fade_ether_protocol/trunk
20 Cured problem with dta_eod missed, when buffer was full at the moment
when dta_eod was asserted.
It caused the client program to hang, as no end of data was transmitted
and no new data arrived...
wzab 3512d 02h /fade_ether_protocol/trunk

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