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[/] [i2c/] [tags/] [rel_1] - Rev 33

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Rev Log message Author Age Path
13 Fixed some synthesis warnings. rherveille 8289d 04h /i2c/tags/rel_1
12 no message rherveille 8294d 20h /i2c/tags/rel_1
11 Changed RST_LVL define to parameter. rherveille 8298d 03h /i2c/tags/rel_1
10 Created new directory structure.
Added Verilog version.		 rherveille 8320d 00h /i2c/tags/rel_1
9 Created directory structure (documentation, vhdl, verilog) rherveille 8389d 19h /i2c/tags/rel_1
8 Created directory structure (documentation, vhdl, verilog) rherveille 8389d 19h /i2c/tags/rel_1
7 added some remarks, fixed some sensitivity lists rherveille 8458d 21h /i2c/tags/rel_1
6 fixed typo txt -> txr rherveille 8463d 01h /i2c/tags/rel_1
5 fixed an incomplete sensitivity list on assign_dato process rherveille 8469d 23h /i2c/tags/rel_1
4 WISHBONE I2C Master Core: initial release rherveille 8522d 02h /i2c/tags/rel_1

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